China's official 2025 series recorded about 484.28 billion integrated circuits produced, up 10.9 percent year on year, a context signal rather than a package qualification for any single device [S2].
Procurement teams that conflate that national output with a specific package capability, say a 25µm-pitch HBM stack on a reticle-spanning compute die, are the teams that release tooling on a number instead of a record [S2][S3].
Scope: from commodity QFP to CoWoS-class advanced packaging
The 2026 IC packaging market spans commodity lead-frame packages such as QFP, SSOP, TSSOP and LQFP, plastic BGA, FCBGA, fan-out wafer-level packaging, 2.5D silicon interposers, and 3D die stacks [S1][S3][S4]. A 100,000+ SKU marketplace listing on 28 August 2026 shows QFP drivers at $12-20 per piece with a 1-piece minimum, SSOP28 logic at $0.30, and a 16-TSSOP SN74HC138PWR lot at $3-15 per 5 pieces, all from Shenzhen-based distributors with 4-7 year track records [S1].
At the other end, advanced packaging for AI accelerators separates by bump pitch, stack count and reticle budget: a 4-HBM design at 35µm pitch can land on FoCoS, while 8 HBM stacks at 25µm pitch with a reticle-spanning compute die point to CoWoS or Intel EMIB as the only real options in late 2026 [S3]. Procurement should not treat these as a single category.
Five files, never interchangeable
The procurement framework that survives engineering review treats every supplier conversation as five distinct records that must be kept connected, but never merged [S2].
File 1, the package definition file, holds the package drawing, family code, pin or ball count, body size, lead pitch and substrate stack-up, the kind of data a drawing reviewer signs off before any quote matters. File 2, the materials and thermal file, captures mold compound, die-attach, substrate, underfill, lid or heat-spreader, and the thermal path from junction to case, with diamond-metalized composite substrates already shipping in the 5-700 W/m·K range for high-power packaging [S4]. File 3, the assembly and test file, names the OSAT, the assembly line, the test programme, the coverage definition, and the failure-analysis route. File 4, the traceability and change file, defines lot history, change-control windows, and what counts as a customer-visible revision. File 5, the transaction file, addresses whether the die, parties and destination create an export-control or compliance boundary [S2].
A supplier that answers all five precisely is giving more useful information than one that offers a long catalogue; the one who can quote capacity but not test coverage is not yet a route, only a conversation [S2].
Who this gate is for, and who it is not for
This five-file gate is built for programmes where a wrong package decision costs a respin, a tooling re-cut, or a 90-day line stop, which is to say ASIC, AI accelerator, automotive-grade MCU, industrial SoC, and any multi-die heterogeneous-integration design [S2][S3].
It is overkill for commodity QFP, SSOP, TSSOP, SOT or TO-92 buys at 1-100 piece MOQ from a 16-year Shenzhen distributor with 749 interested customers and a 4.9/5.0 rating, where a 2026 marketplace quote of $0.10-1 per NE5532DR is already complete evidence for the application [S1]. The error is to apply an OSAT-grade gate to a $0.30 SSOP28 buy; the equal and opposite error is to apply a catalogue buy to a 4-HBM 35µm-pitch stack.
Comparison: commodity lead-frame vs FCBGA vs 2.5D/3D advanced
Three packaging families dominate 2026 B2B sourcing decisions, and they answer very differently on the same five criteria [S1][S3][S4].
On unit cost, commodity lead-frame QFP/SSOP/TSSOP/SOT sits at $0.06-20 per piece on the 2026 marketplace with 1-100 piece MOQ, while FCBGA, for example the FCBGA-672 XC4VFX40-10FFG672I, sits at $1-3 per piece at 1-piece MOQ, and 2.5D/3D stacks are quoted per wafer or per known-good-die rather than per piece [S1][S4]. On thermal path, lead-frame packages dissipate through leads and copper-frame, often without an explicit heat spreader; FCBGA uses a substrate thermal ball or lid; 2.5D stacks route through TSV, microbumps, and a silicon interposer with a lid, which is why high-power packages have moved to diamond-metalized composite substrates at 5-700 W/m·K [S4]. On test coverage, lead-frame parts get bench or ATE at ambient; FCBGA needs boundary-scan, JTAG, and often burn-in; 2.5D stacks require known-good-die, micro-bump inspection, and post-stack re-test [S2][S3]. On minimum engagement, lead-frame buys are 1-100 pieces, FCBGA is 1-10 pieces for engineering samples and thousands for production, and 2.5D is a multi-quarter tape-in with a capacity-allocation review. On lead time, lead-frame ships in 1-3 working days from a one-stop BOM matching service, FCBGA is weeks to a quarter, and 2.5D is 2-3 quarters at minimum [S1][S3].
Use case: AI accelerator stack-out beyond CoWoS
For AI chips in late 2026, the question is not whether CoWoS is good, it is whether the design fits the platform [S3]. A two-step gate applies.
Step 1 characterises the die: HBM stack count, microbump pitch, reticle budget of the compute die, and target volume over the next 2-3 years. Step 2 maps platform options against that envelope: FoCoS for 4 HBM stacks at 35µm pitch, CoWoS or Intel EMIB for 8 HBM stacks at 25µm pitch on a reticle-spanning die, and Samsung alternatives for capacity-sensitive designs where a second-source path matters more than absolute pitch leadership [S3]. The procurement file in this case is the reticle map, the bump-pitch drawing, the HBM vendor's KGD agreement, and the OSAT's capacity allocation letter, not a price list.
Limitations, failure modes, and what desk research cannot do
Desk research defines evidence boundaries, it does not qualify a package, audit a line, or substitute for live engineering review [S2]. A 2024 OSAT market summary from TrendForce described continued leadership by ASE and Amkor alongside strong growth at named China-based OSATs, with more demanding heterogeneous-integration, wafer-level, die-stacking and test requirements, but that is a category read, not a supplier release [S2].
Three failure modes recur. First, treating a national output number as a package qualification. Second, accepting an "advanced packaging" label on a quote without the bump pitch, stack count and substrate stack-up in writing. Third, skipping the transaction file when the die, parties or destination create an export-control boundary, which is the most expensive of the three because the failure is legal, not electrical. None of these are solved by a longer supplier list; they are solved by which five records the engineering team demands before signing a PO.
Sourcing, standards and trackable signals
Public sourcing data on 28 August 2026 shows 100,000+ IC-package SKUs across 4,300+ suppliers and a parallel 57,000+ semiconductor-chip-packaging SKUs across 2,400+ suppliers, with unit prices from $0.06 to over $1,688 and minimum orders as low as 1 piece [S1][S4]. Reorder rates on the 2026 listings range from 3% to 55%, supplier ages from 1 to 16 years, and on-time delivery badges cluster in the 4.4-5.0/5.0 band, useful as a triage filter, not as a release [S1][S4].
Trackable signals for the next 6 months: any revision to the JEDEC registration dossiers for the FCBGA and 2.5D packages named above, any change to the China-based OSAT capacity-allocation letters cited in the 2024 TrendForce summary, and any new microbump-pitch or HBM-stack roadmap disclosure from the named advanced-packaging platforms, all of which feed back into the package-definition and assembly-and-test files. For related cross-domain buying, see the Sourcing Smart Meters from China: Spec-First Buying Guide for 2026 approach, the same five-file discipline transfers cleanly to any component that mixes compliance, thermal and traceability risk, while Data Center Cooling 2026: Liquid Surge, Vendor Map, and Spec Gate shows the same pattern in thermal-heavy infrastructure. For a deeper read on the broader packaging-equipment side, the vacuum packaging machine and packaging material references cover the upstream tooling and substrate-handling layer that any high-mix OSAT line depends on.
Spec-level background on the components involved: linear guide.