Counterfeit electronic component detection is built on two technical pillars, physical inspection and electrical testing, with the inspection methods formally organized by SAE AS6171 and the avoidance framework set by SAE AS5553 (released April 2009) [S8]. Counterfeits in circulation are categorized into five classes: recycled, remarked, out-of-specification/defective, cloned, and tampered [S2].
Long-lifecycle industries (defense, aerospace, energy, medical) sit at the sharpest end: equipment service lives of 20+ years collide with average component lifecycles of 5-7 years, which forces reliance on obsolete or DMSMS (diminishing manufacturing sources and material shortages) stock and opens the door to fakes [S2]. A useful sibling reference for adjacent gray-market detection is covered in counterfeit bearing inspection, where similar documentation-vs-physical-test logic applies.
Five Counterfeit Classes Defined by AS6171
AS6171 defines five distinct counterfeit categories, and each one drives a different detection workflow [S2]. Recycled parts are harvested from used PCBs, re-conditioned, and re-sold as new; lead dressing and remarking are the tell-tales. Remarked parts are genuine OCM (original component manufacturer) devices whose markings have been lasered off and re-printed to misrepresent grade, temperature range, or qualification level. Out-of-spec/defective parts were failed by the OCM and reintroduced as conforming.
Cloned parts are unauthorized reproductions, made by reverse engineering or illicit IP transfer, that mimic the OCM device in fit, function, and pinout but use lower-grade silicon or processes. Tampered parts are typically cloned chips with additional hardware or firmware implants for sabotage or covert exfiltration [S2]. The same taxonomy (with slight wording variation) is reproduced across industry guidance, confirming that detection test plans should be written against these five classes rather than a generic "fake" label [S5].
Physical Inspection: From Visual to Sub-Micron Imaging
Physical inspection of suspect parts starts at the package and markings and escalates to destructive imaging only when non-destructive checks are inconclusive [S3][S4]. Entry-level checks include screening for misspellings, mismatched or impossible date codes, missing MSL (moisture sensitivity level) indicators, and inconsistent font or alignment on the top mark [S3].
Higher-resolution inspection uses high-intensity digital microscopes to examine surfaces down to the sub-micron level, looking for sanding marks, re-laser evidence, and tool pits from remarking [S2]. When the package passes visual, the next tier is non-destructive imaging: X-ray for internal die and bond-wire geometry, and scanning acoustic microscopy (SAM) for delamination, voids, and die-attach voids. Destructive tests, where a sample is decapsulated using fuming nitric acid or laser ablation to expose the die, then inspected via SEM (scanning electron microscope) or optical microscopy for die revision, mask set differences, and process node signatures [S4].
Per published research, physical inspection has the broadest applicability across IC and passive types but carries the drawbacks of low confidence per test, destructive sample consumption, and the need for high-cost capital equipment (X-ray, TEM, FIB) plus trained operators [S4]. The University of Florida counterfeit-ic.org repository was built specifically to address the data gap, hosting statistically characterized defect images from hundreds of suspect chips to support automated classification [S4].
Electrical Testing: Curve Trace, Parameter Limits, and Functional Vectors
Electrical testing validates whether the part actually behaves like the device on its datasheet. Curve trace machines are the workhorse, sweeping current, voltage, diode resistivity, and silicon connectivity to compare against golden-unit traces or datasheet envelopes [S9]. For passives, the test set typically validates resistance, capacitance, ESR (equivalent series resistance), and leakage at rated voltage before moving to full-functional vectors [S5].
For active devices, DC parametric tests (Vth, IDSS, leakage on un-powered pins) are followed by AC functional tests at speed, including timing, jitter, and power-rail noise, often at multiple temperature corners to expose parts that only fail at high or low temperature. Limitations: electrical test must distinguish genuine counterfeits from normal process variation, and each IC type demands a custom test plan, golden reference, and often a custom load board, which is why labs pair physical and electrical results rather than relying on one stream alone [S4].
The test chain is layered in practice: incoming goods go through documentation review and visual first; borderline lots move to X-ray and curve trace; only lots with unresolved risk get decapsulated or sent for full electrical qualification [S2][S5]. For an analogous reliability-gating workflow on a different commodity, see taper bush inspection before reuse, where visual + dimensional checks run before any load test is committed.
Comparison of Main Detection Methods
Method, primary defect caught, equipment cost, sample destructive, and best-fit application line up as follows for screening decisions [S2][S4]:
Visual / marking inspection catches remarked, refurbished, and packaging-tampered parts; equipment cost is low (microscope, comparator), sample is non-destructive, and it is the right first filter for any high-volume incoming line [S3].
X-ray imaging catches die-swap, bond-wire re-work, and internal voiding on BGAs and QFNs; equipment cost is medium-high, sample is non-destructive, and it is the standard second pass for any lot with documentation gaps [S4].
Decapsulation + die inspection catches cloned, out-of-spec, and tampered parts; equipment cost is medium (acid hood, microscope) and sample is destructive, so it is reserved for sample-based audit or escalated disputes [S2][S4].
Curve trace and DC parametric testing catches out-of-spec and remarked-up-graded parts, particularly when an alleged mil-spec or industrial-temp part is run against the spec envelope; equipment cost is medium and sample is non-destructive when proper sockets are used [S9].
Full-functional ATE (automated test equipment) testing, including at-temp corners, is the strongest single signal for cloned and tampered parts but carries the highest per-part cost and engineering setup burden, so it is typically limited to small lots and high-reliability programs [S4][S5].
Standards, Supply-Chain Controls, and the AERI / SAE Workflow
AS5553, released by SAE International in April 2009, sets the avoidance, detection, mitigation, and disposition framework, while AS6171 standardizes the test methods, workmanship criteria, and minimum training/certification requirements applied once a part is no longer traceable to the OCM or authorized distribution [S8][S2]. The two standards together form the audit baseline that most US defense and aerospace OEMs flow down to their distributors.
Recommended field workflow per practitioner guidance: first confirm the lot's documentation chain (OCM invoice, authorized distributor, date code, lot trace), then apply the AERI sequence: markings and packaging for spelling, font, date code plausibility, and MSL bag integrity, followed by visual under microscope, then X-ray and curve trace on a sampled basis, and finally decapsulation or full electrical on parts that survive to escalation [S3]. A further supply-chain practice now considered standard: source from franchised distributors, audit independent distributors to AS6496, quarantine suspect lots in bonded inventory, and require suppliers to report counterfeit incidents under GIDEP (Government-Industry Data Exchange Program) [S2][S4].
For lab-instrument-adjacent process instrumentation that often lives in the same inspection cells, see the electronic test and measurement reference and the electronic test overview, both of which cover the curve tracer, source-measure unit, and parametric ATE categories used in counterfeit screening.
What Detection Cannot Catch, and What To Do About It
No single test stream closes the loop. Physical inspection is weak on cloned parts whose package and die are well-copied, and electrical parametric tests alone may not flag a tampered chip whose malicious logic only fires under rare conditions [S4]. Standard guidance is therefore to combine at least two methods, gate the lot on both, and use a documented risk-acceptance path (including GIDEP reporting) when no full chain of custody exists [S2][S6].
Trackable signals worth watching in 2026: tighter AS6171 test-method coverage for tampered parts, broader GIDEP incident reporting, and wider franchised-distributor audit requirements flowing down to EMS (electronics manufacturing services) providers. For comparison data on related commodity-level detection programs, see counterfeit bearing detection and the taper bush reuse-or-scrap criteria.
For component-level specifications, see gas detection.