Function generators divide into four architecture tiers (analog, DDS-based AFG, arbitrary waveform generator, and RF vector signal generator) with bandwidth spanning roughly 1 MHz to 6 GHz and price from about 60 USD hobby units to over 100,000 USD RF vector units, per Keysight's 2026 buying guide [S1].
For a buyer the spec sheet distils into five knobs: maximum sine frequency, sample rate, memory depth, vertical resolution (8/10/12/14/16-bit DAC), and total harmonic distortion plus jitter. These five numbers decide whether the instrument qualifies for your stimulus at all, before modulation, channels, or connectivity enter the discussion [S1][S5].
Four Architecture Tiers, Not One Product Family
The cheapest analog function generators use a discrete oscillator loop and frequency divider, producing sine, square, and triangle up to roughly 20 MHz with very low distortion, but no arbitrary waveform and very limited frequency resolution [S5]. DDS-based arbitrary function generators (AFG) replace the analog loop with a digital accumulator and DAC, giving micro-Hz frequency resolution, instant switching between preset frequencies, and the ability to play user-defined periodic shapes, with sine bandwidths commonly from 5 MHz up to about 250 MHz in bench form [S1][S5].
Above the AFG sits the true arbitrary waveform generator (AWG), which replaces the small periodic table with deep waveform memory (1 Mpoints to 4 Gpoints) and high sample rates (250 MS/s to 12 GS/s) so you can replay long, non-repeating, or pulses-with-large-off-time sequences that an AFG's limited memory cannot hold [S3][S5]. RF vector signal generators add I/Q modulation, phase-coherent channels, and frequencies up to 6 GHz or higher for receiver and ADC test, which is a different procurement category entirely and not a like-for-like upgrade of an AFG [S1].
The Five Specs That Actually Filter Candidates
Maximum sine frequency is the headline but square-wave and pulse specs are usually the binding constraint: a 30 MHz sine does not guarantee a 30 MHz square, and 50 MHz clock reproduction needs the scope to show 3rd, ideally 5th, harmonic without attenuation, which demands an AFG or AWG spec roughly three to five times the clock edge rate [S2]. Sample rate must exceed twice the highest spectral component you need (Nyquist) and ideally four to five times it for clean pulses, so a 100 MHz signal with 10 ns edges points to a 500 MS/s or higher AWG rather than a 250 MS/s AFG [S5].
Memory depth sets how long a non-repeating waveform you can stream at full sample rate, with deep-memory bench AWGs starting at 1 Mpoint and rackmount units reaching 4 Gpoints per channel [S5]. Vertical resolution, 8-bit on entry units, 10 to 14-bit on mainstream AFG/AWG, 16-bit on dedicated audio-class AWG, controls spurious-free dynamic range, and a 14-bit DAC yields roughly 16x more dynamic range than 8-bit, which matters for radar pulse shaping and ADC stimulus, not audio amplitude accuracy [S5]. Jitter, expressed in picoseconds RMS, gates clock-source and serial-bus work; mainstream AFGs sit around 25 to 100 ps RMS while dedicated pulse/pattern generators reach under 5 ps [S1][S3].
Selection by Use Case: Clock, Pulse, Modulation, IQ
For embedded clock-source and digital-comm test, an AFG with dual channels, floating outputs for differential signalling (PECL, LVPECL, LVDS), and pulse or square frequency up to 160 MHz is the cost-effective default over a dedicated pulse generator, per Tek's application note [S3]. Frequency-margining on a clock is a 2-step set-up: set the centre frequency, then sweep the deviation, which is natively supported on DDS-based AFGs because frequency is a register value rather than a tuned circuit [S3].
For strain-gauge amplifier, sensor-signal, and transducer stimulus, the task is usually low-frequency, low-distortion sine, and any AFG with THD below 0.05 percent and amplitude down to 10 mVpp handles it without resorting to an AWG [S1]. For long non-repeating or stressed-pattern stimulus, an AWG with 1 Mpoint-plus memory and at least 250 MS/s sample rate is the right tier; AFG memory is intentionally small because it stores only short periodic shapes, and trying to use it for long arbitrary sequences is a known misuse [S5]. A selection reference for instrumentation-adjacent sourcing, Signal Calibrator Suppliers 2026, uses a similar spec-tier grid when the DUT stimulus is a calibrated process value rather than a waveform. When the work extends to logging captures over hours or days, Data Logger Suppliers 2026 maps the companion purchase. For shop-floor test where stimulus turns into a count or rate, the spec tier logic in Counter Equipment Across Three Frontiers reads as the same five-knob filter.
Criteria Comparison: Entry AFG, Mid-range AFG, AWG, RF Vector
Entry DDS AFG (sub-1,000 USD, e.g. 10-30 MHz sine, 125 MS/s, 8 or 10-bit, 4 kpoint memory) covers hobby, bench teaching, and basic repair work; it is the tier the EEVblog community points first-time buyers at for a "first function generator" [S2]. Mid-range AFG (1,000-10,000 USD, 80-250 MHz sine, 1-2 GSa/s, 14-bit, 16 Mpoint memory) covers serial-bus stimulus, clock margining, and general R&D; this is the workhorse tier where most embedded and automotive electronics teams stop [S1][S3]. AWG (10,000-50,000 USD, 500 MHz-1 GHz analog BW, 1-4 Gpoint memory, 10-16-bit) covers radar pulse shaping, ADC test, and serial-data stress with deterministic jitter under 10 ps [S5]. RF vector signal generator (20,000 USD and up, 6 GHz+, I/Q modulation) is a separate category for receiver and RF-conformance test and is not a like-for-like step up from an AFG [S1].
Who Should Not Buy the Cheapest Tier
If your stimulus involves digital clocks faster than 20 MHz, you need square edges with sub-10 ns rise time, or you need to replay a captured real-world waveform longer than a few hundred microseconds, a sub-200 USD DDS unit will not work; you need the 80-250 MHz mid-range AFG or an AWG, full stop [S2][S3]. Tek's primer is explicit that an AFG is the right tool when the DUT needs the classic waveforms and fast switching between two frequencies, and that when you need the versatility of long arbitrary playout you move to an AWG, because the architectures are tuned to different jobs rather than one being a strict superset of the other [S3][S5].
The hobby-buying advice in the EEVblog thread also flags jitter, phase noise at audio frequencies, multi-channel need, and arbitrary waveform length as decision points that the spec sheet's headline bandwidth hides, and recommends reading a guide like Keysight's before purchase [S2].
Modulation, Channels, Connectivity, and Form Factor
Modulation coverage (AM, FM, PM, FSK, PSK, PWM, sweep, burst) is standard on most DDS AFGs, but internal modulation source quality and external modulation input impedance vary, so check the modulation bandwidth and distortion spec rather than just the modulation label [S1]. Dual channels with adjustable phase and amplitude are needed for differential clock, I/Q baseband, or differential serial stimulus, and floating outputs (channel-to-channel isolation above 42 Vpk) matter when you drive bridge-type sensors [S3]. Connectivity (USB, LAN, GPIB, optional BNC reference in/out, and external trigger or marker) is decisive for ATE use, where LAN-VXI-11 and LXI compliance shortens integration time, while front-panel-only USB-stick import is enough for the bench [S1]. Form factor (bench 2U to 4U vs PXIe for ATE) and weight matter for ATE rack density but are not headline specs; for PXIe AWG modules, NI lists the same five-knob filter (bandwidth, sample rate, memory, resolution, jitter) [S5].
Common Selection Mistakes and Failure Modes
Choosing by maximum sine frequency alone is the single most common error: a 50 MHz sine unit may stop at 5 MHz square or pulse, and a 1 GHz RF vector generator may have worse jitter and distortion on a 1 MHz sine than a 100 USD AFG, because the architectures are tuned to different figures of merit [S2][S3]. Sample-rate starvation shows up as alias spurs on pulsed or modulated waveforms; 4x oversampling of the highest spectral component is the practical floor, not 2x [S5]. Memory under-spec is why long arbitrary playout appears truncated or repeated; check both the per-channel waveform memory and the maximum number of segments and sequence steps, since some AFG platforms impose a hidden sequence-step cap [S5]. Vertical-resolution under-spec shows up as visible quantization steps on low-amplitude ramp or triangle stimulus; for sub-1 mVpp amplitude work, 12-bit is a practical minimum, with 14 or 16-bit preferred [S5]. Jitter under-spec ruins clock-margining work; total jitter at the output (not internal DDS jitter alone) is the number to ask for [S1][S3].
Standards, Calibration, and Sourcing
Function generators used in regulated test are typically specified with an annual calibration cycle traceable to a national metrology institute, with the calibration interval and the test-equipment recall policy (often 12 months) controlled by the buyer's quality system rather than by an industry-mandated standard on the generator itself [S1][S5]. EMC-compliance for the instrument as a piece of lab equipment is covered by generic CE/FCC rules, while the signals it produces are not themselves held to a single standard; rather, the standard governing the DUT test (USB, HDMI, automotive serial buses, cellular conformance) sets the stimulus tolerance the generator must meet [S1]. Warranty and service-plan terms (3-year standard on most bench units, with on-site calibration options on rackmount and PXIe) are a direct procurement criterion on units above 5,000 USD, where a calibration cycle typically runs several hundred to low-thousand USD per visit [S1][S5].
Track three signals over the next buying cycle: (1) 14-bit and 16-bit AWG price points are still drifting down and will pull mid-range AWG capability into the high-end AFG bracket; (2) PXIe AWG modules are closing the gap with bench AWG on sample rate, which matters for ATE refresh decisions; (3) the 1 GHz+ analog bandwidth bench AWG with sub-5 ps jitter is the spec envelope to watch for serial-data and ADC test refresh through 2026-2027 [S1][S5].
For component-level specifications, see function generator, vacuum generator, and static var generator.