TOPCon cell production lines ship at 24.5–25.5% commercial efficiency on 182×182 mm and 210×210 mm n-type wafers, with the rear-side tunnel oxide (~1–2 nm) plus phosphorus-doped polysilicon stack being the single most demanding process-control node in the line [S3].
The nine-step TOPCon flow runs texturing, B-diffusion, BSG removal, LPCVD/PE-poly, P-diffusion, PSG removal/edge isolation, ALD-AlOx, PECVD-SiNx, and metallization/firing, and each step carries its own dedicated process control instrumentation from boron and phosphorus diffusion furnaces to inline wet benches and atomic-layer deposition tools [S1][S6].
Front-end wet chemistry: texturing, BSG removal, and edge isolation
Single-crystal batch texturing uses alkaline chemistry to produce pyramidal or inverted-pyramid structures that lift light absorption, and the etcher is paired with a downstream inline BSG-removal station plus alkaline polisher that strips phosphosilicate glass with HF (SiO2 + HF to H2SiF6 + H2O) before RCA cleaning [S1].
The same line typically chains PSG removal and edge isolation on a single inline wet bench using HF-based chemistry on rear and sidewalls, with silane-based protective monolayers providing selective OH- diffusion barriers that prevent SiO2 attack while accelerating anisotropic {111}/{100} etching of the back-side silicon [S1]. Spec gates for these wet stations are bath temperature (typically 20–25°C on the alkaline side, 40–60°C on HF stages), HF concentration by titration, and a final resistivity rinse below the 18.2 MΩ·cm DI ceiling, monitored by inline conductivity and pH probes tied to the process control PLC [S1].
Junction formation: B-diffusion for the p+ emitter and P-diffusion for n+ poly
For n-type TOPCon, BCl3 is diffused at high temperature to form the p+ emitter and the PN junction, with a 6-tube boron diffusion furnace as the standard workhorse for 166/182/210 mm formats [S1]. On the rear side, POCl3 pyrolysis produces P2O5 that reacts with the polysilicon (2P2O5 + 5Si = 5SiO2 + 4P), and the in-situ phosphorus concentration profile is the key spec gate for sheet resistance and contact recombination [S1].
Emitter sheet resistance, target 80–120 Ω/sq on the p+ side, is the dominant control variable and is normally held to within ±5 Ω/sq by closed-loop control of furnace temperature, BCl3/POCl3 mass-flow, and push/pull speed; pyrometer-based wafer-temperature tracking is mandatory because the boron tail defines the J0 [S1][S6]. For context on how furnace instrumentation and PID loops are specified across PV cell lines, see the cross-sector procurement note on TOPCon line instrumentation pull-throughs.
LPCVD vs PE-Poly: which rear stack and why
LPCVD (low-pressure chemical vapor deposition) of the intrinsic a-Si and doped poly-Si is the workhorse for rear passivation, using thermal decomposition of silane (SiH4(g) to Si(s) + 2H2(g)) at sub-atmospheric pressure, with a thermal oxidation pre-step (O2 + Si to SiOx) growing the tunnel oxide that defines the passivation contact [S1]. PE-Poly (plasma-enhanced CVD) is the competing route, prized for lower thermal budget and higher throughput, but generally delivers a slightly lower implied Voc and a more sensitive in-situ uniformity profile, so the choice is dominated by the line's tolerance for thermal budget against its implied-Voc target [S6][S8].
The critical control dimensions for LPCVD are tunnel-oxide thickness at 1–2 nm (set by oxidation time and temperature), poly-Si thickness at 100–200 nm, and run-to-run phosphorus dose uniformity across the load; typical specs are tube pressure below 1 Torr, deposition rate in the 1–5 nm/min range, and a within-wafer thickness non-uniformity target below ±3% for production-grade n-type TOPCon [S1][S3]. For the 1–2 nm tunnel oxide, in-line spectroscopic ellipsometry with sub-Å resolution is the standard control, and the ALD and PECVD steps downstream anchor to the same metrology node for end-of-line Voc [S1].
ALD-AlOx and PECVD-SiNx: passivation and ARC stack
Atomic layer deposition lays down 4–8 nm of AlOx on the front face over the p+ emitter, with the negative fixed charges in the AlOx providing field-effect passivation that stops electrons at the AlOx/Si interface in n-type silicon and pulls surface recombination velocity S_eff below 10 cm/s, the headline passivation metric for TOPCon [S1][S6].
PECVD then deposits 75–80 nm of SiNx on the front as the anti-reflection coating and a separate SiNx layer on the rear over the poly-Si, and the front-side SiNx is also tuned for hydrogen release during firing so it can supply atomic H to the AlOx/Si interface and recover passivation that was lost during the high-temperature metallization step [S6]. A typical 2026 production line runs ALD cycle times around 1–2 s/cycle at 200–300°C substrate temperature and PECVD at 400–500°C with 13.56 MHz RF, with film-thickness and refractive-index (n ≈ 2.0–2.1 at 632 nm) set-points trended via inline spectroscopic reflectometry [S1][S6].
Metallization, firing, and laser-enhanced contact formation
Modern 2026 lines use laser for tighter dimensional control and lower kerf loss when cutting the full-size wafer into half-cells, and the firing furnace plus light-injection integrated system runs as a two-track process where the high-temperature stage is dominated by Ag-Si-frit reactions forming silver-silicon alloys, and the cooling stage is dominated by recrystallization and grain growth of the silver particles on the silicon surface [S1][S6].
Busbar and soldering-pad widths land at 0.036±0.02 mm on 182×182 mm cells (10–16 busbars) and 0.045±0.02 mm on 210×210 mm cells (18 busbars), with silver-aluminum pads on the back; the ultra-fine 36 µm grid fingers on top-end cells push the screen-printing spec to stencil thickness and snap-off speed that have to be re-validated whenever the silver paste lot changes [S1][S2][S3]. A Class 6 clean room envelope plus AAA Class IV testers are the typical QA envelope, with EL and automated optical inspection as the end-of-line gates for microcracks and finger interrupts [S2].
Electrical and thermal targets that define the spec map
Commercial TOPCon cells now ship at 24.5–25.5% efficiency, with R&D cells targeting 26–28%, and the headline electrical numbers on 182×182 mm are Pmax 7.76–8.02 W, Vmpp 0.6008–0.617 V, Impp 12.89–12.95 A, Voc 0.708–0.717 V, Isc 13.64–13.70 A, and Fill Factor 80.3–81.6% on 10BB layouts, while larger 210 mm formats lift Impp to 15.33–17.60 A and Isc to 15.95–18.33 A [S3][S4].
The thermal spec sits at Pmax temperature coefficient −0.29 to −0.32%/°C, Voc coefficient −0.25 to −0.30%/°C, and Isc +0.04 to +0.045%/°C, with NOCT around 42±2°C, year-1 degradation held under 1%, and 25–30 year output retention at 87–90% or better; low-light relative efficiency is held above 97% at 200 W/m² and the cells are specified for system voltages up to 1,500 V DC with 80–85% bifaciality, free of boron-oxygen related degradation that plagues p-type PERC [S3].
Process-control instrumentation: the spec gates that decide yield
The three highest-leverage process control nodes in a TOPCon line are, in order, LPCVD tube pressure and deposition rate uniformity (controls poly-Si thickness and Voc), ALD-AlOx thickness and refractive index (controls S_eff and implied Voc), and PECVD-SiNx refractive index and hydrogen content (controls anti-reflection and post-firing passivation recovery) [S1][S6][S8].
Spec gates for these three nodes are typically: LPCVD within-wafer thickness non-uniformity below ±3% with run-to-run drift below 1%, ALD AlOx thickness 4–8 nm with ±1% control, and PECVD SiNx n-value at 632 nm within ±0.02 of the 2.0–2.1 setpoint; these translate into inline metrology slots for spectroscopic ellipsometry, reflectometry, and a quasi-steady-state photoluminescence (QSSPL) tool that reports implied Voc as a fast proxy for end-of-line efficiency before metallization even runs [S1][S6]. Equipment-side, the second-hand market currently lists integrated firing-and-light-injection two-track systems from Maxwell and LECO, plus LPCVD systems from Laplace, with borosilicate-glass removal, alkaline polishing, and inline RCA cleaning from CHINA S.C. and Kingenious, and laser cell-cutting tools supporting M6/M10/M12 wafer formats [S1][S7].
Who this process fits, and where it is constrained
TOPCon is the right choice for new n-type capacity where the line can be built around tunnel-oxide uniformity, ALD throughput, and PECVD hydrogen-profiling, but it is not the right choice for retrofits of legacy PERC lines that lack a 1,500 V system voltage budget, the ALD toolset, or the silver-paste consumption headroom (TOPCon runs slightly higher Ag usage than PERC) [S3][S6].
The dominant failure modes are tunnel-oxide pinholes from poor LPCVD/oxidation control, poly-Si blistering during firing, AlOx/Si interface hydrogen-starvation if the SiNx cap is too lean, and Voc drift under high-temperature operation; on the 1500 V system ceiling, TUV/IEC 61215 and IEC 61730 hot-spot and bypass-diode tests are the standard qualification gates, while front efficiency above 25.00%, bifaciality at 80±5%, and efficiency accuracy within 0.10% are the commercial datasheet anchors [S2][S3]. Watch for the next cycle of capacity-add announcements from Chinese n-type integrators in Q4 2026 and for the second wave of ALD-throughput debottlenecking to land at the SNEC spring 2027 window as the leading indicators for whether TOPCon can hold its 25%+ commercial share against the encroaching HJT and tandem-cell programs [S1][S2][S6].
The underlying component specifications are covered under load cell, and load cell module.