When a supplier flags a part as "on allocation," it is rationing: orders have exceeded what the fab can ship inside the quoted lead time, so the manufacturer distributes limited stock across its book of business, weighted by recent purchase history, and pushes the rest out or onto backorder [S1][S2].
The visible symptoms are lead-time jumps (often from a few weeks to 30, 40 or 52+ weeks), partial shipments, and "decommits" where a previously-confirmed delivery date is moved or cancelled outright [S1].
Shortage vs allocation: two different things in one supply chain
A shortage is the market condition: total industry output is below total industry demand, and the gap is real. Allocation is the supplier's administrative response to that condition, the formal process of deciding who gets how much of the supply that does exist [S1]. During a shortage you can still find open-market stock via independent distributors; once a part is on allocation through the authorised channel, the alternative sources stop being optional and start being the only sources that work [S1][S2].
The confusion matters operationally. A buyer who only watches for "shortage" headlines can miss a part that is still physically available but locked behind a fair-share queue at the franchised line, and a buyer who treats every allocation notice as a shortage can over-react and trigger the double-ordering reflex that makes the next round worse [S1][S2].
What actually puts a part on allocation
GlobX's five-cause taxonomy lines up almost one-for-one with the field data: demand spikes (automotive electrification, industrial automation, AI hardware), limited fab and packaging capacity, double-ordering multipliers, single-source parts, and discrete disruptions (factory shutdowns, trade restrictions, raw-material constraints) [S1]. RH Electronics adds the same five but emphasises that the cascade is rarely contained to one part: a constraint on a single process node or one passive family ripples through every product that depends on it [S2].
The double-ordering mechanism is the one engineers underestimate. When buyers panic and place inflated orders across multiple distributors, reported demand roughly doubles relative to real end-demand, which then triggers allocation at lower real-utilisation levels, which then triggers more double-ordering, a self-reinforcing loop that converts a tight market into a panicked one within a quarter [S1][S2]. Single-source parts are the first to fall: any component with only one qualified manufacturer is a single point of failure the moment that fab is constrained [S1].
How it hits an OEM or EMS production line
Allocation costs a factory in four measurable ways: line-down risk when a critical part simply does not arrive, working capital tied up in pre-buys and safety stock, higher bill-of-materials cost from expedite fees and open-market premiums, and diverted engineering time spent on redesigns and alternate-part qualifications [S1]. De-commits make planning unreliable because the supplier can move a delivery date the buyer was already counting on, and the "be safe" double-ordering reflex leaves the same buyer holding excess inventory the quarter after supply normalises [S1][S2].
The 2026 GPU supply chain is a worked example. Advanced GPUs require not just cutting-edge wafer nodes but also scarce advanced-packaging capacity and test resources, so when allocation shifts hit one product, the same constraint reduces wafers available to competing GPUs, slows the ramp of new models from other vendors, and lengthens lead times for GPU boards and servers downstream [S3]. A buyer who does not purchase Nvidia silicon directly still feels this through server and accelerator lead times, because the allocation shock propagates along the shared packaging and substrate lines [S3].
DDR5 and the memory-specific rationing pattern
J2 Sourcing's July 2026 brief frames memory allocation as the industry's polite word for rationing, and DDR5 is the live case: demand from AI server builds and PC platform refreshes has run ahead of the DRAM makers' capacity-add curve, so the suppliers are distributing finished units by historical share rather than by order book [S4]. The practical signature is the same as for any allocated part (partial shipments, 30-40 week lead times, de-commits on confirmed POs), but the upstream cause is concentrated: a small number of DRAM fabs on a small number of process nodes, with HBM and DDR5 competing for the same clean-room output [S4].
For European buyers the implication is straightforward. A DDR5 module on allocation through the franchised channel will not be unblocked by throwing more orders at the same supplier; the bottleneck is wafer starts, not order entry. The realistic moves are lengthening the order horizon to match the allocation window, qualifying a second DRAM source early, and using independent distributors for the gap between immediate need and the next authorised allocation drop [S2][S4].
How an independent distributor actually fills the gap
While a buyer sits in the authorised queue, an independent distributor reaches supply outside it: distributor overstock, manufacturer excess, and stock held in other regions where the part is still moving at normal lead times [S2]. When the exact part cannot arrive in time, a competent independent will also qualify a form-fit-function alternative, a pin-compatible, electrically-equivalent part that drops into the same footprint and BOM line [S2].
The counterweight is counterfeit risk. Allocation periods are peak season for counterfeiters, because the price gap between authorised and grey-market stock widens exactly when buyers are most willing to skip incoming inspection, so authentication, traceability to the original manufacturer, and lot-level testing matter more during allocation, not less [S2]. The same logic applies to MLCCs, power MOSFETs, and IGBTs, all of which are on the September 2026 allocation list and all of which have well-documented counterfeit histories [S1][S2].
Comparing the main rationed categories in 2026
Four part families dominate the September 2026 allocation map, and they behave differently along the dimensions a buyer cares about. DDR5 memory is bottlenecked at the DRAM wafer, with long allocation queues and HBM pulling capacity away from standard DIMMs [S4]. Power semiconductors (MOSFETs, IGBTs, SiC devices) are gated by 8-inch and 12-inch fab capacity plus packaging, and the silicon-carbide transition has not yet added enough supply to ease the queue [S1]. Advanced-node GPUs and AI accelerators are constrained simultaneously at wafer, CoWoS-style advanced packaging, and HBM stack assembly, which is why a shock on one product cascades into the rest of the accelerator market [S3].
On the decision criteria that matter to a buyer's sourcing team, the four families line up roughly as follows. Lead-time spread: DDR5 30-40 weeks, MLCC 20-40 weeks, power semis 30-52 weeks, advanced GPUs 40-52+ weeks. Counterfeit risk during allocation: high across all four, worst on power semis and GPUs. Second-source feasibility: moderate for MLCCs and power MOSFETs, low for DDR5 and the leading AI accelerators. Form-fit-function substitute viability: good for MLCCs and standard MOSFETs, poor for GPU SKUs and JEDEC-specific DDR5 modules [S1][S2][S3][S4]. The implication is that qualification work done now, before the next wave, is what separates a clean allocation response from a line-down event.
What to do about it: the working playbook
GlobX's playbook compresses to seven actions, and the first three do most of the work: map single-source and long-lead-time risk across the BOM, stop the reflexive double-ordering that inflates reported demand, and open a second sourcing channel (independent distributor or regional alternate) before the part goes on allocation rather than after [S1]. The remaining four actions, place longer-horizon orders aligned to the allocation window, qualify form-fit-function alternates in advance, negotiate allocation-share visibility with the franchised supplier, and add authentication/inspection on every grey-market receipt, are the ones that keep the line running once the queue is established [S1][S2].
The freight and capacity side of the playbook is just as real. When air freight versus ocean for semiconductor shortages is the decision, see how cost and transit time trade off against allocation urgency, and when AI-cluster switch ASICs are stretching to roughly 52 weeks, the underlying constraint is the same advanced-packaging and HBM bottleneck that drives the GPU allocation map. For a wider read on how the same dynamic hits server and accelerator assembly at the ODM level, the 2026 AI server ODM capacity picture is the natural next reference.
The next two trackable signals to watch are the quarterly DRAM and HBM capacity-utilisation prints from the major memory makers (any sustained drop below the mid-90s is the first sign the DDR5 queue will shorten) and the CoWoS and 2.5-D advanced-packaging capacity additions, which gate both AI accelerator supply and the high-end GPU allocation window [S3][S4].
For component-level specifications, see construction machinery and equipment, lamps and light fittings, and lighting equipment and electric lamps.
See also our earlier report, Air Freight vs Ocean for Semiconductor Shortages: Cost-Speed Trade.