Passive copper DAC assemblies are generally the shortest-lead-time interconnect for sub-3 m GPU-to-switch and intra-rack leaf links, with active copper (ACC/AEC) covering the 3-7 m band and AOC absorbing anything from roughly 5 m out to about 100 m where copper gauge and bend radius stop being practical [S4][S7].
The trade is no longer a clean copper-versus-fiber argument: at 800G, Vitex's interconnect mass data puts a 1,000-cable passive DAC bundle at about 90 kg versus roughly 40 kg for AEC and under 30 kg for AOC, and that mass differential flows directly into pathway fill, airflow, and install hours per rack [S6]. Lead-time behaviour tracks the same way: copper gauge dominates at 400G/800G, optical engine supply dominates at 1.6T, and mis-spec'd copper forces field rework that wipes out any unit-price win [S2].
What the four cable types actually are
A direct-attach copper (DAC) cable is a factory-terminated twinax assembly, typically 24-30 AWG, with integrated pluggable ends that match the host form factor (SFP+, QSFP28, QSFP-DD, OSFP) and no active electronics in the connector [S4]. Passive DACs draw only EEPROM power and stay below about 0.1-0.3 W per end, which is why hyperscale ToR designs still anchor on them for the shortest hops [S4][S5].
An active copper cable (ACC) and an active electrical cable (AEC) both put signal-conditioning or retiming electronics in the connector housing to extend copper reach; an AOC instead embeds an optical engine and multimode fiber inside the same sealed assembly, trading the active copper electronics for E/O conversion at each end [S1][S3][S4]. The practical cut-points in 2026 reference designs: passive DAC roughly 0.5-3 m at 400G/800G, ACC/AEC roughly 3-7 m, and AOC 5-100 m depending on speed and platform [S4][S7].
Lead-time mechanics: where the weeks actually go
Copper DAC lead time is dominated by twinax gauge, AWG-24 and AWG-26 bulk stock, and connector overmold capacity; the optics side of the industry routinely flags AWG-24 twinax as a chokepoint for higher-speed passive copper runs, which is why 800G passive DAC above 2-3 m often shifts to active copper or optical [S3][S4]. AOC lead time tracks the optical engine supply (the embedded transceiver die plus laser array) and the MPO/LC fiber harness build, not the copper wire itself; a fab capacity hiccup on the engine pushes the whole assembly out, regardless of cable length [S3].
Field-rework cost is the hidden lead-time multiplier: a wrong-length or out-of-spec copper DAC on a dense GPU rack means pulling a 10-14 mm diameter cable bundle back out of a stacked fabric, and the Equaloptics writeup specifically calls out that AOC can win on total schedule once it avoids that rework loop, even when its unit price is higher [S2][S6]. At 1,000-cable scale, the mass and bend-radius gap between 10-14 mm DAC, 5-7 mm AEC, and 3-4 mm AOC also drives pathway-fill rework in overhead trays, a non-trivial line item on greenfield AI halls [S6].
Reach, power, and thermal: the engineering floor
Passive DAC reach is bounded by copper loss and skew, so 10G SFP+ typically runs 0.5-7 m, 25G SFP28 0.5-5 m, 100G QSFP28 about 0.5-5 m, and 200G/400G often only 0.5-2-3 m depending on platform SerDes and FEC settings [S4]. Active copper (ACC/AEC) uses equalisation and sometimes retiming to push the same copper pair further, generally to about 7 m and in some cases to roughly 15 m for lower speeds, while keeping the power budget well below optical [S4][S5].
AOC reach is set by the multimode fiber budget and the optical engine, so 3-100 m is the working envelope for 100G-800G AOCs, with 200G/400G/800G AOCs commonly stocked at 3, 5, 10, 15, 20, 30, 50 m lengths [S3][S4]. The power delta is real: a passive DAC end is essentially free, an active copper end draws hundreds of milliwatts to about 1 W for signal conditioning, and an AOC end typically lands at about 1-2 W per end for the E/O conversion plus driver [S4][S5]. Across a 1,024-port GPU fabric, that delta moves tens of watts per rack and starts to show up in the cooling budget, though it is still a fraction of the accelerator load.
Comparison matrix: DAC vs ACC vs AEC vs AOC on the four decision criteria
On unit price, passive DAC is the cheapest short-reach option, often cited at roughly one-half to one-fifth the cost of a fiber equivalent under 5 m, with ACC/AEC sitting between DAC and AOC and AOC priced on optical-engine content [S5]. On reach, the stack is DAC sub-3 m at 400G/800G, ACC/AEC roughly 3-7 m, AOC 5-100 m, which is why GPU-to-ToR inside a single rack is a DAC problem and GPU-to-spine across a hot aisle is an AOC problem [S4][S7].
On lead-time robustness, DAC depends on twinax gauge and overmold capacity, ACC/AEC add active component sourcing on top, and AOC depends on optical engine and MPO harness supply; the practical 2026 read is that passive DAC still has the shortest, most predictable lead time for the sub-3 m slot, while AOC has the most stable lead time for anything that exceeds copper's reach, because copper gauge becomes the limiting factor long before optical engine supply does [S2][S3][S4]. On airflow and pathway fill, passive DAC at 10-14 mm outer diameter is the worst offender, AEC at 5-7 mm is the middle, and AOC at 3-4 mm wins clearly, with 1,000-cable bundle masses of roughly 90 kg, 40 kg, and under 30 kg respectively [S6].
Where each cable type is the right call
For inside-the-rack GPU-to-ToR or server-to-leaf runs under about 2 m at 400G/800G, passive DAC is the default: lowest cost, lowest latency, no optics, predictable supply [S4][S5]. For 3-7 m adjacent-rack or across-a-cold-aisle links where copper gauge starts to bite, AEC is the modern default where supported by the switch SerDes, and ACC where platform validation demands it; both keep the BOM copper-based and avoid the optical-engine supply line [S1][S3][S4].
For 5-100 m GPU-to-spine, inter-rack, or inter-pod links, AOC is the default in 2026 GPU fabrics, with InfiniBand NDR/XDR and RoCE 800G/1.6T deployments stocking 10-30 m AOCs as the baseline and longer AOCs for cross-aisle GPU pools [S3][S4]. For dense pathways where pathway fill, bend radius, and airflow are already constrained, the 800G interconnects reference framing of mass and bend-radius becomes the deciding input even before price, and AOC's 3-4 mm profile is what keeps a 1,000-cable run out of cable tray over-fill [S6].
Limits, failure modes, and what to watch
DAC's hard limit is gauge and reach: at 400G/800G, cables above 2-3 m start to fail link training or require FEC concessions on platforms that do not negotiate them gracefully, and bending a 10-14 mm copper bundle past its rated radius in a dense rack is a common field failure [S4][S6][S7]. ACC/AEC's failure mode is the active electronics: a connector fail means a full assembly RMA, and signal-integrity margins that look fine on a 3 m run can collapse on a 7 m run if the host SerDes is tight [S1][S7].
AOC's failure modes are the optical engine (laser degradation, EEPROM interoperability on multi-vendor switch fabrics) and the fiber (bend loss, MPO contamination at install), which is why factory-terminated AOCs reduce field-test failures but still need clean inspection [S3][S4]. On hyperscale procurement, the wider supply-chain context is the Four Chokepoints Gate AI Server-Rack Buildouts in 2026 writeup, which sits upstream of this copper-versus-optical decision and explains why twinax AWG-24 and optical engine capacity both sit on the watchlist. The accelerator-side backdrop is laid out in the AI accelerator supply chain map: wafer to rack, 2026 layers and chokepoints piece, which frames the GPU volume that drives all of this cabling demand in the first place.
Specification and standards touchpoints
Form-factor compliance is the gating spec: SFF-8432, SFF-8665, SFF-8636, QSFP-DD/QSFP-DD800, and OSFP define the mechanical and electrical interface that every DAC, ACC, AEC, and AOC must meet to plug into a compliant host, and these are the specs buyers should cite on a BOM rather than proprietary vendor PNs [S4]. For the underlying electrical channel, IEEE 802.3ck (100G per lane), 802.3cu (400G), and the 802.3df/802.3dj 800G/1.6T projects define the SerDes and signaling that govern how far a given cable type can run at a given speed, which is why the same cable vendor publishes different reach numbers per host platform [S4].
Multi-vendor interoperability for AOCs hinges on the memory map and DOM/DDM behaviour defined in the SFF modules above plus the CMIS management interface used in QSFP-DD/OSFP, which is why a DAC that swaps cleanly between two switch vendors can fail to link as an AOC if one vendor's CMIS implementation is stricter [S3][S4]. For compliance context, industrial network topology decisions parallel this: the cable has to match the management plane of the switch, not just the physical layer, or the link does not come up.
Procurement checklist for 2026 AI cluster cabling
Lock the topology before the BOM: confirm host SerDes (100G-per-lane NDR vs 200G-per-lane XDR vs 200G/400G/800G Ethernet), FEC mode, and the planned maximum run length per link type, because the same SKU behaves very differently across these three [S3][S4]. Stock two lengths per link type (a nominal and a +1 m service loop), because field-rework cost on a wrong-length copper bundle exceeds the unit-price saving of the cheaper option [S2][S6].
For the industrial valve-style decision on standardisation, write a cable matrix that names the cable type by link class: ToR-to-server passive DAC, leaf-to-spine ACC/AEC up to 7 m, spine-to-spine or inter-pod AOC 10-30 m, and inter-row AOC 30-100 m, then push volume through the qualified SKU to keep lead time compressed [S1][S3][S4]. Validate multi-vendor interoperability on AOC SKUs before freezing the matrix, because CMIS and DOM behaviour varies by host, and that variability is the single biggest source of late-stage link-training tickets on AI fabric bring-up [S3][S4].
Trackable signals over the next quarter: 1.6T OSFP XDR DAC and AOC splitter availability, AWG-24 twinax allocation from incumbent vendors, and AOC optical engine output from the second-tier Chinese suppliers that have been adding capacity through 2025-2026 [S3]. Lead-time movement on any one of those three is the leading indicator for whether passive DAC stays cheapest and fastest in its slot, or whether the 3-7 m window tips more decisively to AEC and AOC for 2026 AI cluster buildouts [S2][S3][S4][S6].